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general description the MAX15039 high-efficiency switching regulator delivers up to 6a load current at output voltages from 0.6v to 90% of v in . the ic operates from 2.9v to 5.5v, making it ideal for on-board point-of-load and postregu- lation applications. total output error is less than 1% over load, line, and temperature ranges. the MAX15039 features fixed-frequency pwm mode operation with a switching frequency range of 500khz to 2mhz set by an external resistor. the MAX15039 provides the option of operating in a skip mode to improve light-load efficiency. high-frequency operation allows for an all-ceramic capacitor design. the high operating frequency also allows for small-size external components. the low-resistance on-chip nmos switches ensure high efficiency at heavy loads while minimizing critical induc- tances, making the layout a much simpler task with respect to discrete solutions. following a simple layout and footprint ensures first-pass success in new designs. the MAX15039 comes with a high bandwidth (28mhz) voltage-error amplifier. the voltage-mode control archi- tecture and the voltage-error amplifier permit a type iii compensation scheme to be utilized to achieve maxi- mum loop bandwidth, up to 20% of the switching fre- quency. high loop bandwidth provides fast transient response, resulting in less required output capacitance and allowing for all-ceramic-capacitor designs. the MAX15039 provides two three-state logic inputs to select one of nine preset output voltages. the preset output voltages allow customers to achieve 1% out- put-voltage accuracy without using expensive 0.1% resistors. in addition, the output voltage can be set to any customer value by either using two external resis- tors at the feedback with a 0.6v internal reference or applying an external reference voltage to the refin input. the MAX15039 offers programmable soft-start time using one capacitor to reduce input inrush current. applications server power supplies pols asic/cpu/dsp core and i/o voltages ddr power supplies base-station power supplies telecom and networking power supplies raid control power supplies features ? internal 26m r ds(on) high-side and 20m r ds(on) low-side mosfets ? continuous 6a output current over temperature ? ?% output accuracy over load, line, and temperature ? operates from 2.9v to 5.5v v in supply ? adjustable output from 0.6v to (0.9 x v in ) ? soft-start reduces inrush supply current ? 500khz to 2mhz adjustable switching frequency ? compatible with ceramic, polymer, and electrolytic output capacitors ? nine preset and adjustable output voltages 0.6v, 0.7v, 0.8v, 1.0v, 1.2v, 1.5v, 1.8v, 2.0v, 2.5v, and adjustable ? monotonic startup for safe-start into prebiased outputs ? selectable forced pwm or skip mode for light load efficiency ? overcurrent and overtemperature protection ? output current sink/source capable with cycle- by-cycle protection ? open-drain, power-good output ? lead-free, 4mm x 4mm, 24-pin thin qfn package MAX15039 6a, 2mhz step-down regulator with integrated switches ________________________________________________________________ maxim integrated products 1 output 1.8v, 6a input 2.9v to 5.5v bst lx out in en v dd ctl2 ctl1 pgnd fb v dd comp pwrgd freq refin ss gnd mode MAX15039 typical operating circuit ordering information 19-4321; rev 3; 12/10 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package MAX15039etg+ -40c to +85c 24 thin qfn-ep* + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. pin configuration appears at end of data sheet. evaluation kit available
MAX15039 6a, 2mhz step-down regulator with integrated switches 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v in = v en = 5v, c vdd = 2.2?, t a = t j = -40? to +85?, typical values are at t a = +25?, circuit of figure 1, unless otherwise noted.) (note 3) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in, pwrgd to gnd..................................................-0.3v to +6v v dd to gnd ..................-0.3v to the lower of +4v or (v in + 0.3v) comp, fb, mode, refin, ctl1, ctl2, ss, freq to gnd ..........................................-0.3v to (v dd + 0.3v) out, en to gnd ......................................................-0.3v to +6v bst to lx..................................................................-0.3v to +6v bst to gnd ............................................................-0.3v to +12v pgnd to gnd .......................................................-0.3v to +0.3v lx to pgnd ..................-0.3v to the lower of +6v or (v in + 0.3v) lx to pgnd ..........-1v to the lower of +6v or (v in + 1v) for 50ns i lx(rms) (note 1) ......................................................................6a v dd output short-circuit duration .............................continuous converter output short-circuit duration ....................continuous continuous power dissipation (t a = +70?) 24-pin tqfn (derate 27.8mw/? above +70?) ........2222mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) .......................................+260? note 2: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . note 1: lx has internal clamp diodes to pgnd and in. applications that forward bias these diodes should take care not to exceed the ic? package power dissipation limits. parameter conditions min typ max units in in voltage range 2.9 5.5 v v in = 3.3v 4.9 8 in supply current f s = 1mhz, no load v in = 5v 5.2 8.5 ma v in = 5v, v en = 0v 10 20 total shutdown current from in v in = v dd = 3.3v, v en = 0v 45 ? 3.3v ldo (v dd ) v dd rising 2.6 2.8 v dd falling 2.35 2.55 v v dd undervoltage lockout threshold lx starts/stops switching minimum glitch-width rejection 10 ? v dd output voltage v in = 5v, i vdd = 0 to 10ma 3.1 3.3 3.5 v v dd dropout v in = 2.9v, i vdd = 10ma 0.08 v v dd current limit v in = 5v, v dd = 0v 25 40 ma bst bst supply current v bst = v in = 5v, v lx = 0 or 5v, v en = 0v 0.025 ? pwm comparator pwm comparator propagation delay 10mv overdrive 20 ns pwm peak-to-peak ramp amplitude 1v pwm valley amplitude 0.8 v package thermal characteristics (note 2) tqfn junction-to-ambient thermal resistance ( ja ) ............36?/w junction-to-case resistance ( jc ).................................6?/w
MAX15039 6a, 2mhz step-down regulator with integrated switches _______________________________________________________________________________________ 3 electrical characteristics (continued) (v in = v en = 5v, c vdd = 2.2f, t a = t j = -40c to +85c, typical values are at t a = +25c, circuit of figure 1, unless otherwise noted.) (note 3) parameter conditions min typ max units error amplifier comp clamp voltage, high v in = 2.9v to 5v, v fb = 0.5v, v refin = 0.6v 2 v comp clamp voltage, low v in = 2.9v to 5v, v fb = 0.7v, v refin = 0.6v 0.7 v comp slew rate v fb step from 0.5v to 0.7v in 10ns 1.6 v/s comp shutdown resistance from comp to gnd, v in = 3.3v, v comp = 100mv, v en = v ss = 0v 6 internally preset output voltage accuracy v refin = v ss , mode = gnd -1 +1 % fb set-point value ctl1 = ctl2 = gnd, mode = gnd 0.594 0.6 0.606 v fb to out resistor all vid settings except ctl1 = ctl2 = gnd 5.5 8 10.5 k open-loop voltage gain 115 db error-amplifier unity-gain bandwidth 28 mhz error-amplifier and refin common-mode input range v dd = 2.9v to 3.5v 0 v dd - 2 v v fb = 0.7v, sinking 1 error-amplifier maximum output current v comp = 1v, v refin = 0.6v v fb = 0.5v, sourcing -1 ma fb input bias current ctl1 = ctl2 = gnd -125 na ctl_ v ctl_ = 0v -7.2 ctl_ input bias current v ctl_ = v dd 7.2 a low, falling 0.8 open v dd /2 ctl_ input threshold high, rising v dd - 0.8 v hysteresis all vid transitions 50 mv refin refin input bias current v refin = 0.6v -185 na refin offset voltage v refin = 0.9v, fb shorted to comp -4.5 +4.5 mv lx (all pins combined) v in = v bst - v lx = 3.3v 35 lx on-resistance, high side i lx = -2a v in = v bst - v lx = 5v 26 45 m v in = 3.3v 25 lx on-resistance, low side i lx = 2a v in = 5v 20 35 m high-side sourcing 9 11 low-side sinking 11 lx current-limit threshold zero-crossing current threshold, mode = v dd 0.2 a v lx = 0v -0.01 lx leakage current v in = 5v, v en = 0v v lx = 5v -0.01 a
MAX15039 6a, 2mhz step-down regulator with integrated switches 4 _______________________________________________________________________________________ electrical characteristics (continued) (v in = v en = 5v, c vdd = 2.2f, t a = t j = -40c to +85c, typical values are at t a = +25c, circuit of figure 1, unless otherwise noted.) (note 3) parameter conditions min typ max units r freq = 49.9k 0.9 1 1.1 lx switching frequency v in = 2.9v to 5.5v r freq = 23.6k 1.8 2 2.2 mhz switching frequency range 500 2000 khz lx minimum off-time 78 ns lx maximum duty cycle r freq = 49.9k 92 95 % lx minimum duty cycle r freq = 49.9k 515% average short-circuit in supply current out connected to gnd, v in = 5v 0.35 a rms lx output current 6a enable en input logic-low threshold en falling 0.9 v en input logic-high threshold en rising 1.5 v en input current v en = 0 or 5v, v in = 5v 0.01 a mode logic-low, falling 26 logic v dd /2 or open, rising 50 mode input-logic threshold logic-high, rising 74 %v dd mode input-logic hysteresis mode falling 5 %v dd mode = gnd -5 mode input bias current mode = v dd 5 a ss ss current v ss = 0.45v, v refin = 0.6v, sourcing 6.7 8 9.3 a thermal shutdown thermal-shutdown threshold rising 165 c thermal-shutdown hysteresis 25 c power good (pwrgd) v fb falling, v refin = 0.6v 88 90 92 power-good threshold voltage v fb rising, v refin = 0.6v 92.5 % v refin power-good edge deglitch v fb rising or falling 48 clock cycles pwrgd output-voltage low i pwrgd = 4ma 0.03 0.1 v pwrgd leakage current v in = v pwrgd = 5v, v fb = 0.7v, v refin = 0.6v 0.01 a hiccup overcurrent limit current-limit startup blanking 112 clock cycles autoretry restart time 896 clock cycles
MAX15039 6a, 2mhz step-down regulator with integrated switches _______________________________________________________________________________________ 5 efficiency vs. output current MAX15039 toc01 output current (a) efficiency (%) 1.0 50 60 70 80 90 100 40 0.1 10.0 v out = 2.5v v out = 1.8v v out = 1.2v pwm skip efficiency vs. output current MAX15039 toc02 output current (a) efficiency (%) 1.0 50 60 70 80 90 100 40 0.1 10.0 v out = 2.5v v out = 1.8v v out = 1.2v v in = 3.3v pwm skip frequency vs. input voltage MAX15039 toc03 input voltage (v) frequency (mhz) 5.0 4.5 3.0 3.5 4.0 1.85 1.90 1.95 2.00 2.05 2.10 2.15 2.20 1.80 2.5 5.5 t a = +85 c t a = +25 c t a = -40 c r freq = 23.2k frequency vs. input voltage MAX15039 toc04 input voltage (v) frequency (mhz) 5.0 4.5 3.0 3.5 4.0 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 0.80 2.5 5.5 t a = +85 c t a = +25 c t a = -40 c r freq = 49.9k load regulation MAX15039 toc05a load current (a) output-voltage change (%) 5 6 4 123 -0.45 -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0 -0.50 07 v out = 1.2v v out = 1.8v v out = 2.5v line regulation (load = 6a) MAX15039 toc05b input voltage (v) output-voltage change (%) 5.0 4.5 4.0 3.5 3.0 -0.10 -0.08 -0.06 -0.04 -0.02 0 -0.12 2.5 5.5 v out = 1.2v v out = 1.8v typical operating characteristics (typical values are v in = v en = 5v, v out = 1.8v, r freq = 49.9k , i out = 6a, t a = +25c, circuit of figure 1, unless otherwise noted.) electrical characteristics (continued) (v in = v en = 5v, c vdd = 2.2f, t a = t j = -40c to +85c, typical values are at t a = +25c, circuit of figure 1, unless otherwise noted.) (note 3) parameter conditions min typ max units fb hiccup threshold v fb falling 70 % v refin hiccup threshold blanking time v fb falling 28 s note 3: specifications are 100% production tested at t a = +25c. limits over the operating temperature range are guaranteed by design.
MAX15039 6a, 2mhz step-down regulator with integrated switches 6 _______________________________________________________________________________________ typical operating characteristics (continued) (typical values are v in = v en = 5v, v out = 1.8v, r freq = 49.9k , i out = 6a, t a = +25c, circuit of figure 1, unless otherwise noted.) load transient MAX15039 toc06 40 s/div v out ac-coupled 100mv/div 2a i out 0a switching waveforms (forced pwm, 2a load) MAX15039 toc07 400ns/div ac-coupled 50mv/div v out i lx v lx 2a/div 0a 5v/div switching waveforms (skip mode, no load) MAX15039 toc08 2 s/div ac-coupled 100mv/div v out i lx v lx 1a/div 0a 0v 5v/div soft-start waveform (r load = 0.5 ) MAX15039 toc09 400 s/div v en 5v/div 0v v out 1v/div shutdown waveform (r load = 0.5 ) MAX15039 toc10 10 s/div v en 5v/div 0v v out 1v/div input shutdown current vs. input voltage MAX15039 toc11 input voltage (v) input shutdown current ( a) 5.0 4.5 4.0 3.5 3.0 6 7 8 9 10 11 12 5 2.5 5.5 v en = 0v maximum output current vs. output voltage MAX15039 toc12 output voltage (v) maximum output current (a) 2.0 1.5 1.0 3 4 5 6 7 8 9 10 2 0.5 2.5
MAX15039 6a, 2mhz step-down regulator with integrated switches _______________________________________________________________________________________ 7 typical operating characteristics (continued) (typical values are v in = v en = 5v, v out = 1.8v, r freq = 49.9k , i out = 6a, t a = +25c, circuit of figure 1, unless otherwise noted.) hiccup current limit MAX15039 toc13 400 s/div 1v/div 5a/div 1a/div 0v 0a 0a v out i out i in rms input current during short circuit vs. input voltage MAX15039 toc14 input voltage (v) rms input current (a) 5.0 4.5 4.0 3.5 3.0 0.1 0.3 0.2 0.5 0.4 0.7 0.6 0.8 0 2.5 5.5 v out = 0v exposed pad temperature vs. ambient temperature MAX15039 toc15 ambient temperature ( c) exposed pad temperature ( c) 80 60 40 20 10 20 30 40 50 60 70 80 90 100 0 0100 measured on a MAX15039evkit 6a load feedback voltage vs. temperature MAX15039 toc16 temperature ( c) feedback voltage (v) 60 35 -15 10 0.57 0.58 0.59 0.60 0.62 0.61 0.63 0.64 0.56 -40 85 soft-start with refin MAX15039 toc17 200 s/div 1a/div 0.5v/div 2v/div 0a 1v/div 0v 0v 0v i in v pwrgd v refin v out starting into prebiased output (mode = v dd , v out = 2.5v, 2a load) MAX15039 toc18 200 s/div 5v/div 1v/div 5v/div 0v 2a 0a 0v 0v v en v pwrgd v out i out starting into prebiased output (mode = v dd /2, v out = 2.5v, 2a load) MAX15039 toc19 200 s/div 5v/div 1v/div 5v/div 0v 2a 0a 0v 0v v en v pwrgd v out i out
MAX15039 6a, 2mhz step-down regulator with integrated switches 8 _______________________________________________________________________________________ typical operating characteristics (continued) (typical values are v in = v en = 5v, v out = 1.8v, r freq = 49.9k , i out = 6a, t a = +25c, circuit of figure 1, unless otherwise noted.) starting into prebiased output (mode = v dd , v out = 2.5v, no load) MAX15039 toc20 200 s/div v en 2v/div v out 1v/div v pwrgd 2v/div 0v 0v 0v starting into prebiased output (mode = v dd /2, v out = 2.5v, no load) MAX15039 toc21 200 s/div v en 2v/div v out 1v/div v pwrgd 2v/div 0v 0v 0v starting into prebiased output above nominal set point (v out = 1.5v) MAX15039 toc22 1ms/div v en 2v/div v out 1v/div v pwrgd 2v/div 0v 0v 0v v mode = v dd , no load starting into prebiased output above nominal set point (v out = 1.5v) MAX15039 toc23 1ms/div v en 2v/div v out 1v/div v pwrgd 2v/div 0v 0v 0v v out = 1.5v, v mode = v dd /2, no load transition from skip mode to forced pwm mode MAX15039 toc24 2ms/div v mode 5v/div v lx 5v/div v out 0.5v/div 0v no load transition from forced pwm mode to skip mode MAX15039 toc25 4ms/div v mode 5v/div v lx 5v/div v out 0.5v/div 0v no load
MAX15039 6a, 2mhz step-down regulator with integrated switches _______________________________________________________________________________________ 9 pin description pin name function 1 mode functional mode selection input. see the mode selection section for more information. 2v dd 3.3v ldo output. supply input for the internal analog core. connect a low-esr, ceramic capacitor with a minimum value of 2.2f from v dd to gnd. 3 ctl1 4 ctl2 preset output-voltage selection inputs. ctl1 and ctl2 set the output voltage to one of nine preset voltages. see table 1 and the programming the output voltage (ctl1, ctl2) section for preset voltages. 5 refin external reference input. connect refin to ss to use the internal 0.6v reference. connecting refin to an external voltage forces fb to regulate to the voltage applied to refin. refin is internally pulled to gnd when the ic is in shutdown/hiccup mode. 6ss soft-start input. connect a capacitor from ss to gnd to set the startup time. use a capacitor with a 1nf minimum value. see the soft-start and refin section for details on setting the soft-start time. 7 gnd analog ground connection. connect gnd and pgnd together at one point near the input bypass capacitor return terminal. 8 comp voltage error-amplifier output. connect the necessary compensation network from comp to fb and out. comp is internally pulled to gnd when the ic is in shutdown/hiccup mode. 9fb feedback input. connect fb to the center tap of an external resistive divider from the output to gnd to set the output voltage from 0.6v to 90% of v in . connect fb through an rc network to the output when using ctl1 and ctl2 to select any of nine preset voltages. 10 out output-voltage sense. connect to the converter output. leave out unconnected when an external resistive divider is used. 11 freq oscillator frequency select. connect a precision resistor from freq to gnd to select the switching frequency. see the frequency select (freq) section. 12 pwrgd open-drain, power-good output. pwrgd is high impedance when v fb rises above 92.5% (typ) of v refin and v refin is above 0.54v. pwrgd is internally pulled low when v fb falls below 90% (typ) of v refin or v refin is below 0.54v. pwrgd is internally pulled low when the ic is in shutdown mode, v dd is below the internal uvlo threshold, or the ic is in thermal shutdown. 13 bst high-side mosfet driver supply. internally connected to in through a pmos switch. bypass bst to lx with a 0.1f capacitor. 14, 15, 16 lx inductor connection. all lx pins are internally shorted together. connect all lx pins to the switched side of the inductor. lx is high impedance when the ic is in shutdown mode. 17C20 pgnd power ground. connect all pgnd pins externally to the power ground plane. connect all pgnd pins together near the ic. 21, 22, 23 in input power supply. input supply range is from 2.9v to 5.5v. bypass in to pgnd with a 22f ceramic capacitor. 24 en enable input. logic input to enable/disable the MAX15039. ep exposed pad. solder ep to a large contiguous copper plane connected to pgnd to optimize thermal performance. do not use ep as a ground connection for the device.
MAX15039 6a, 2mhz step-down regulator with integrated switches 10 ______________________________________________________________________________________ block diagram control logic in lx pgnd mode in bst thermal shutdown soft-start voltage reference bias generator oscillator 1v p-p shutdown control uvlo circuitry 3.3v ldo v dd shdn fb 0.9 x v refin ss fb comp gnd pwrgd freq error amplifier pwm comparator current-limit comparator current-limit comparator bst switch comp clamps en refin vid voltage- control circuitry out ctl2 ctl1 8k MAX15039
MAX15039 c10 0.1 f c6 22 f output 1.8v, 6a input 2.9v to 5.5v c7 0.1 f c5 2.2 f bst lx out in v dd ctl2 ctl1 pgnd fb c1 33pf c2 1500pf v dd r1 20k r2 2.67k comp l1 0.47 h c3 560pf c4 0.022 f r4 49.9k c8 22 f c9 0.01 f r3 158 pwrgd en freq refin ss gnd mode MAX15039 2.2 c15 1000pf optional figure 1. typical application circuit: 1mhz, all-ceramic-capacitor design with v in = 2.9v to 5.5v and v out = 1.8v detailed description the MAX15039 high-efficiency, voltage-mode switching regulator delivers up to 6a of output current. the MAX15039 provides output voltages from 0.6v to 0.9 x v in from 2.9v to 5.5v input supplies, making it ideal for on-board point-of-load applications. the output-voltage accuracy is better than 1% over load, line, and tem- perature. the MAX15039 features a wide switching frequency range, allowing the user to achieve all-ceramic-capaci- tor designs and fast transient responses (see figure 1). the high operating frequency minimizes the size of external components. the MAX15039 is available in a small (4mm x 4mm), lead-free, 24-pin thin qfn pack- age. the refin function makes the MAX15039 an ideal candidate for ddr and tracking power supplies. using internal low-r ds(on) (20m for the low-side n-channel mosfet and 26m for the high-side n-channel mosfet) maintains high efficiency at both heavy-load and high-switching frequencies. the MAX15039 employs voltage-mode control architec- ture with a high bandwidth (28mhz) error amplifier. the voltage-mode control architecture allows up to 2mhz switching frequency, reducing board area. the op amp voltage-error amplifier works with type iii compensation to fully utilize the bandwidth of the high-frequency switching to obtain fast transient response. adjustable soft-start time provides flexibilities to minimize input startup inrush current. an open-drain, power-good (pwrgd) output goes high when v fb reaches 92.5% of v refin and v refin is greater than 0.54v. the MAX15039 provides an option for three modes of operation: regular pwm, pwm mode with monotonic startup into prebiased output, or skip mode with monot- onic startup into prebiased output. 6a, 2mhz step-down regulator with integrated switches ______________________________________________________________________________________ 11
controller function the controller logic block is the central processor that determines the duty cycle of the high-side mosfet under different line, load, and temperature conditions. under normal operation, where the current-limit and temperature protection are not triggered, the controller logic block takes the output from the pwm comparator and generates the driver signals for both high-side and low-side mosfets. the break-before-make logic and the timing for charging the bootstrap capacitors are calculated by the controller logic block. the error signal from the voltage-error amplifier is compared with the ramp signal generated by the oscillator at the pwm comparator and, thus, the required pwm signal is pro- duced. the high-side switch is turned on at the begin- ning of the oscillator cycle and turns off when the ramp voltage exceeds the v comp signal or the current-limit threshold is exceeded. the low-side switch is then turned on for the remainder of the oscillator cycle. current limit the internal, high-side mosfet has a typical 11a peak current-limit threshold. when current flowing out of lx exceeds this limit, the high-side mosfet turns off and the synchronous rectifier turns on. the synchronous rectifier remains on until the inductor current falls below the low-side current limit. this lowers the duty cycle and causes the output voltage to droop until the current limit is no longer exceeded. the MAX15039 uses a hic- cup mode to prevent overheating during short-circuit output conditions. during current limit, if v fb drops below 70% of v refin and stays below this level for 12s or more, the MAX15039 enters hiccup mode. the high-side mosfet and the synchronous rectifier are turned off and both comp and refin are internally pulled low. if refin and ss are connected together, both are pulled low. the part remains in this state for 896 clock cycles and then attempts to restart for 112 clock cycles. if the fault causing current limit has cleared, the part resumes normal operation. otherwise, the part reenters hiccup mode again. soft-start and refin the MAX15039 utilizes an adjustable soft-start function to limit inrush current during startup. an 8a (typ) cur- rent source charges an external capacitor connected to ss. the soft-start time is adjusted by the value of the external capacitor from ss to gnd. the required capacitance value is determined as: where t ss is the required soft-start time in seconds. the MAX15039 also features an external reference input (refin). the ic regulates fb to the voltage applied to refin. the internal soft-start is not available when using an external reference. a method of soft-start when using an external reference is shown in figure 2. connect refin to ss to use the internal 0.6v reference. use a capacitor of 1nf minimum value at ss. undervoltage lockout (uvlo) the uvlo circuitry inhibits switching when v dd is below 2.55v (typ). once v dd rises above 2.6v (typ), uvlo clears and the soft-start function activates. a 50mv hys- teresis is built in for glitch immunity. bst the gate-drive voltage for the high-side, n-channel switch is generated by a flying-capacitor boost circuit. the capacitor between bst and lx is charged from the v in supply while the low-side mosfet is on. when the low-side mosfet is switched off, the voltage of the capacitor is stacked above lx to provide the necessary turn-on voltage for the high-side internal mosfet. frequency select (freq) the switching frequency is resistor programmable from 500khz to 2mhz. set the switching frequency of the ic with a resistor (r freq ) connected from freq to gnd. r freq is calculated as: where f s is the desired switching frequency in hertz. r k sf s freq s = ? 50 095 1 005 . (.) c at v ss = 8 06 . c r2 r1 refin MAX15039 figure 2. typical soft-start implementation with external reference MAX15039 6a, 2mhz step-down regulator with integrated switches 12 ______________________________________________________________________________________
MAX15039 power-good output (pwrgd) pwrgd is an open-drain output that goes high imped- ance when v fb is above 0.925 x v refin and v refin is above 0.54v for at least 48 clock cycles. pwrgd pulls low when v fb is below 90% of v refin or v refin is below 0.54v for at least 48 clock cycles. pwrgd is low when the ic is in shutdown mode, v dd is below the internal uvlo threshold, or the ic is in thermal shut- down mode. programming the output voltage (ctl1, ctl2) as shown in table 1, the output voltage is pin program- mable by the logic states of ctl1 and ctl2. ctl1 and ctl2 are trilevel inputs: v dd , unconnected, and gnd. an 8.06k resistor must be connected between out and fb when ctl1 and ctl2 are connected to gnd. the logic states of ctl1 and ctl2 should be pro- grammed only before power-up. once the part is enabled, ctl1 and ctl2 should not be changed. if the output voltage needs to be reprogrammed, cycle power or en and reprogram before enabling. the out- put voltage can be programmed continuously from 0.6v to 90% of v in by using a resistor-divider network from v out to fb to gnd as shown in figure 3a. ctl1 and ctl2 must be connected to gnd. shutdown mode drive en to gnd to shut down the ic and reduce quies- cent current to 10a (typ). during shutdown, the lx is high impedance. drive en high to enable the MAX15039. thermal protection thermal-overload protection limits total power dissipation in the device. when the junction temperature exceeds t j = +165c, a thermal sensor forces the device into shutdown, allowing the die to cool. the thermal sensor turns the device on again after the junction temperature cools by 20c, causing a pulsed output during continu- ous overload conditions. the soft-start sequence begins after recovery from a thermal-shutdown condition. applications information in and v dd decoupling to decrease the noise effects due to the high switching frequency and maximize the output accuracy of the MAX15039, decouple in with a 22f capacitor from in to pgnd. also, decouple v dd with a 2.2f low-esr ceramic capacitor from v dd to gnd. place these capacitors as close as possible to the ic. 6a, 2mhz step-down regulator with integrated switches ______________________________________________________________________________________ 13 MAX15039 l c out external resistive divider internal preset voltages v out r3 r4 r1 comp fb out ctl1 ctl2 lx c1 c3 r2 c3 r2 c2 MAX15039 l a) b) c out v out r3 8k r1 comp out fb ctl1 voltage select ctl2 lx c1 c2 figure 3. type iii compensation network ctl1 ctl2 v out (v) v out when using external refin (v) gnd gnd 0.6* or 0.6 < v out 0.9 x v in ** v refin * or v refin < v out 0.9 x v in ** v dd v dd 0.7 v refin x (7/6) gnd unconnected 0.8 v refin x (4/3) gnd v dd 1.0 v refin x (5/3) unconnected gnd 1.2 v refin x 2 unconnected unconnected 1.5 v refin x 2.5 unconnected v dd 1.8 v refin x 3 v dd gnd 2.0 v refin x (10/3) v dd unconnected 2.5 v refin x (25/6) table 1. ctl1 and ctl2 output voltage selection * install an 8.06k resistor at r3 and do not install a resistor at r4. ** install r3 and r4 following the equation in the compensation design section (see figure 3a) .
MAX15039 6a, 2mhz step-down regulator with integrated switches 14 ______________________________________________________________________________________ inductor selection choose an inductor with the following equation: where lir is the ratio of the inductor ripple current to full load current at the minimum duty cycle. choose lir between 20% to 40% for best performance and stability. use an inductor with the lowest possible dc resistance that fits in the allotted dimensions. powdered iron ferrite core types are often the best choice for performance. with any core material, the core must be large enough not to saturate at the current limit of the MAX15039. output-capacitor selection the key selection parameters for the output capacitor are capacitance, esr, esl, and voltage-rating requirements. these affect the overall stability, output ripple voltage, and transient response of the dc-dc converter. the out- put ripple occurs due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitors esr, and the voltage drop due to the capacitors esl. estimate the output-voltage ripple due to the output capacitance, esr, and esl: where the output ripple due to output capacitance, esr, and esl is: or: or whichever is larger. the peak-to-peak inductor current (i p-p ) is: use these equations for initial output-capacitor selec- tion. determine final values by testing a prototype or an evaluation circuit. a smaller ripple current results in less output-voltage ripple. since the inductor ripple current is a factor of the inductor value, the output-voltage rip- ple decreases with larger inductance. use ceramic capacitors for low esr and low esl at the switching frequency of the converter. the ripple voltage due to esl is negligible when using ceramic capacitors. load-transient response depends on the selected out- put capacitance. during a load transient, the output instantly changes by esr x i load . before the con- troller can respond, the output deviates further, depending on the inductor and output capacitor val- ues. after a short time, the controller responds by regu- lating the output voltage back to its predetermined value. the controller response time depends on the closed-loop bandwidth. a higher bandwidth yields a faster response time, preventing the output from deviat- ing further from its regulating value. see the compen- sation design section for more details. input-capacitor selection the input capacitor reduces the current peaks drawn from the input power supply and reduces switching noise in the ic. the total input capacitance must be equal or greater than the value given by the following equation to keep the input-ripple voltage within specifi- cation and minimize the high-frequency ripple current being fed back to the input source: where v in-ripple is the maximum allowed input ripple voltage across the input capacitors and is recommend- ed to be less than 2% of the minimum input voltage. d is the duty cycle (v out /v in ) and t s is the switching period (1/f s ). the impedance of the input capacitor at the switching frequency should be less than that of the input source so high-frequency switching currents do not pass through the input source, but are instead shunted through the input capacitor. the input capacitor must meet the ripple current requirement imposed by the switching currents. the rms input ripple current is given by: where i ripple is the input rms ripple current. ii vvv v ripple load out in out in = ? () c dxt xi v in min sout in ripple _ = - i vv fl x v v pp in out s out in ? = ? v i ripple esl p () = ? p p off t x esl v i t x esl ripple esl pp on () = ? vixe ripple esr p p () = ? s sr v i xc xf ripple c pp out s () = ? 8 vv v v ripple ripple c ripple esr ripple esl =+ + () ( ) ( ) ) l vvv fv liri out in out sin outmax = ? () ()
MAX15039 compensation design the power transfer function consists of one double pole and one zero. the double pole is introduced by the inductor l and the output capacitor c o . the esr of the output capacitor determines the zero. the double pole and zero frequencies are given as follows: where r l is equal to the sum of the output inductors dcr (dc resistance) and the internal switch resistance, r ds(on) . a typical value for r ds(on) is 20m (low-side mosfet) and 26m (high-side mosfet). r o is the output load resistance, which is equal to the rated output voltage divided by the rated output current. esr is the total equiv- alent series resistance of the output capacitor. if there is more than one output capacitor of the same type in paral- lel, the value of the esr in the above equation is equal to that of the esr of a single output capacitor divided by the total number of output capacitors. the high switching frequency range of the MAX15039 allows the use of ceramic output capacitors. since the esr of ceramic capacitors is typically very low, the fre- quency of the associated transfer function zero is higher than the unity-gain crossover frequency, f c , and the zero cannot be used to compensate for the double pole creat- ed by the output filtering inductor and capacitor. the dou- ble pole produces a gain drop of 40db/decade and a phase shift of 180. the compensation network error amplifier must compensate for this gain drop and phase shift to achieve a stable high-bandwidth closed-loop sys- tem. therefore, use type iii compensation as shown in figures 3 and 4. type iii compensation possesses three poles and two zeros with the first pole, f p1_ea , located at zero frequency (dc). locations of other poles and zeros of the type iii compensation are given by: the above equations are based on the assumptions that c1 >> c2 and r3 >> r2 are true in most applica- tions. placements of these poles and zeros are deter- mined by the frequencies of the double pole and esr zero of the power transfer function. it is also a function of the desired close-loop bandwidth. the following sec- tion outlines the step-by-step design procedure to cal- culate the required compensation components for the MAX15039. when the output voltage of the MAX15039 is programmed to a preset voltage, r3 is internal to the ic and r4 does not exist (figure 3b). when externally programming the MAX15039 (figure 3a), the output voltage is determined by: or: if using an external v refin , and v out > v refin . for a 0.6v output, or for v out = v refin , connect an 8.06k resistor from fb to v out . the zero-cross fre- quency of the close-loop, f c , should be between 10% and 20% of the switching frequency, f s . a higher zero- cross frequency results in faster transient response. once f c is chosen, c1 is calculated from the following equation: where v p-p is the ramp peak-to-peak voltage (1v typ). due to the underdamped nature of the output lc dou- ble pole, set the two zero frequencies of the type iii compensation less than the lc double-pole frequency to provide adequate phase boost. set the two zero fre- quencies to 80% of the lc double-pole frequency. hence: c xr x l x c x r esr rr oo lo 3 1 08 3 = + + . () r xc x l x c x r esr rr oo lo 1 1 08 1 = + + . () c x v v xxrx r r f in pp l o c 1 1 5625 231 = + ? . () () () r vr vv refin out refin 4 3 = ? r r v for v v out out 4 06 3 06 06 = > ? . (.) (.) ) 1 223 2 = f rc pea _ f pea 3 1 _ = 2 212 rc f rc zea 2 1 233 _ = f rc zea 1 1 211 _ = f x esr x c z esr o _ = 1 2 ff xlxc x r esr rr plc p lc o o ol 12 1 2 __ == + + ? ? ? ? ? ? 6a, 2mhz step-down regulator with integrated switches ______________________________________________________________________________________ 15
set the third compensation pole at 1/2 of the switching frequency. calculate c2 as follows: the above equations provide application compensation when the zero-cross frequency is significantly higher than the double-pole frequency. when the zero-cross frequen- cy is near the double-pole frequency, the actual zero- cross frequency is higher than the calculated frequency. in this case, lowering the value of r1 reduces the zero- cross frequency. also, set the third pole of the type iii compensation close to the switching frequency if the zero-cross frequency is above 200khz to boost the phase margin. the recommended range for r3 is 2k to 10k . note that the loop compensation remains unchanged if only r4s resistance is altered to set different outputs. mode selection the MAX15039 features a mode selection input (mode) that users can select a functional mode for the device (see table 2). forced-pwm mode connect mode to gnd to select forced-pwm mode. in forced-pwm mode, the MAX15039 operates at a con- stant switching frequency (set by the resistor at freq terminal) with no pulse skipping. pwm operation starts after a brief settling time when en goes high. the low- side switch turns on first, charging the bootstrap capacitor to provide the gate-drive voltage for the high- side switch. the low-side switch turns off either at the end of the clock period or once the low-side switch sinks 1.35a current (typ), whichever occurs first. if the low-side switch is turned off before the end of the clock period, the high-side switch is turned on for the remain- ing part of the time interval until the inductor current reaches 0.9a, or the end of clock cycle is encountered. starting from the first pwm activity, the sink current threshold is increased through an internal 4-step dac to reach the current limit of 11a after 128 clock periods. this is done to help a smooth recovery of the regulated voltage even in case of accidental prebiased output in spite of the initial forced-pwm mode selection. soft-starting into a prebiased output mode (monotonic startup) when mode is left unconnected or biased to v dd /2, the MAX15039 soft-starts into a prebiased output without dis- charging the output capacitor. this type of operation is also termed monotonic startup. see the starting into prebiased output waveforms in the typical operating characteristics section for an example. in monotonic startup mode, both low-side and high- side switches remain off to avoid discharging the prebi- ased output. pwm operation starts when the fb voltage crosses the ss voltage. as in forced-pwm mode, the pwm activity starts with the low-side switch turning on first to build the bootstrap capacitor charge. c rf s 2 1 1 = r c x esr c o 2 3 = double pole gain (db) second pole first and second zeros power-stage transfer function compensation transfer function open-loop gain third pole figure 4. type iii compensation illustration MAX15039 6a, 2mhz step-down regulator with integrated switches 16 ______________________________________________________________________________________ mode connection operation mode gnd forced pwm unconnected or v dd /2 forced pwm. soft-start up into a prebiased output (monotonic startup). v dd skip mode. soft-start into a prebiased output (monotonic startup). table 2. mode selection
MAX15039 the MAX15039 is also able to start into prebiased with the output above the nominal set point without abruptly discharging the output, thanks to the sink current con- trol of the low-side switch through a 4-step dac in 128 clock cycles. monotonic startup mode automatically switches to forced-pwm mode 4096 clock cycles delay after the voltage at fb increases above 92.5% of v refin . the additional delay prevents an early transi- tion from monotonic startup to forced-pwm mode dur- ing soft-start when a prolonged time constant external refin voltage is applied. the maximum allowed soft-start time is 2ms when an external reference is applied at refin in the case of starting up into prebiased output. skip mode connect mode to v dd to select skip mode. in skip mode, the MAX15039 switches only as necessary to maintain the output at light loads (not capable of sinking current from the output), but still operates with fixed-fre- quency (set by the resistor at freq terminal) pwm at medium and heavy loads. this maximizes light-load effi- ciency and reduces the input quiescent current. in case of prolonged high-side idle activity (beyond eight clock cycles), the low-side switch is turned on briefly to rebuild the charge lost in the bootstrap capac- itor before the next on-cycle of the high-side switch. in skip mode, the low-side switch is turned off when the inductor current decreases to 0.2a (typ) to ensure no reverse current flowing from the output capacitor and the best conversion efficiency/minimum supply current. the high-side switch minimum on-time is controlled to guarantee that 0.9a current is reached to avoid high frequency bursts at no load conditions and that might cause a rapid increase of the supply current caused by additional switching losses. even if skip mode is selected at the device turn-on, the monotonic startup mode is internally selected during soft-start. the transition to skip mode is automatically achieved 4096 clock cycles after the voltage at fb increases above 92.5% of v refin . changing from skip mode to forced-pwm mode and vice-versa can be done at any time. the output capaci- tor should be large enough to limit the output-voltage overshoot/undershoot due to the settling times to reach different duty-cycle set points corresponding to forced- pwm mode and skip mode at light loads. pcb layout considerations and thermal performance careful pcb layout is critical to achieve clean and sta- ble operation. it is highly recommended to duplicate the MAX15039 ev kit layout for optimum performance. if devi- ation is necessary, follow these guidelines for good pcb layout: 1) connect input and output capacitors to the power ground plane; connect all other capacitors to the sig- nal ground plane. 2) place capacitors on v dd , in, and ss as close as pos- sible to the ic and its corresponding pin using direct traces. keep power ground plane (connected to pgnd) and signal ground plane (connected to gnd) separate. 3) keep the high-current paths as short and wide as possible. keep the path of switching current short and minimize the loop area formed by lx, the out- put capacitors, and the input capacitors. 4) connect in, lx, and pgnd separately to a large copper area to help cool the ic to further improve efficiency and long-term reliability. 5) ensure all feedback connections are short and direct. place the feedback resistors and compensa- tion components as close as possible to the ic. 6) route high-speed switching nodes, such as lx, away from sensitive analog areas (fb, comp). 6a, 2mhz step-down regulator with integrated switches ______________________________________________________________________________________ 17
MAX15039 6a, 2mhz step-down regulator with integrated switches 18 ______________________________________________________________________________________ chip information process: bicmos thin qfn MAX15039 19 20 ep 21 22 12 3456 18 17 16 15 14 13 23 24 12 11 10 9 8 7 pgnd in pgnd in en mode v dd ctl1 ctl2 refin ss pgnd pgnd lx lx bst in pwrgd out freq fb gnd comp lx top view + pin configuration package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 24 tqfn-ep t2444-4 21-0139 90-0022
MAX15039 6a, 2mhz step-down regulator with integrated switches maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 19 ? 2010 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 10/08 initial release 1 12/09 updated the typical operating characteristics .5 2 5/10 updated the electrical characteristics , table 1, and the compensation design section. 3, 13, 15 3 12/10 corrected error in c1 equation 15

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